Highlights
- High performance and full featured 2 port switch with VLAN, QoS packet prioritization, Rate Limiting, IGMP monitoring and management functions
- Easily interfaces to most 16-bit embedded CPU's
- Unique Virtual PHY feature simplifies software development by mimicking the multiple switch ports as a single port MAC/PHY
- Integrated IEEE 1588 Hardware Time Stamp Unit
Target Applications
- Cable, satellite, and IP set-top boxes
- Digital televisions
- Digital video recorders
- VoIP/Video phone systems
- Home gateways
- Test/Measurement equipment
- Industrial automation systems
Key Benefits
- Ethernet Switch Fabric
- 32K buffer RAM
- 1K entry forwarding table
- Port based IEEE 802.1Q VLAN support (16 groups)
- Programmable IEEE 802.1Q tag insertion/removal
- IEEE 802.1d spanning tree protocol support
- QoS/CoS Packet prioritization
- 4 dynamic QoS queues per port
- Input priority determined by VLAN tag, DA lookup, TOS, DIFFSERV or port default value
- Programmable class of service map based on input priority
- Remapping of 802.1Q priority field on per port basis
- Programmable rate limiting at the ingress/egress ports with random early discard, per port/priority
- IGMP v1/v2/v3 monitoring for Multicast packet filtering
- Programmable filter by MAC address
- Switch Management
- Port mirroring/monitoring/sniffing: ingress and/or egress traffic on any ports or port pairs
- Fully compliant statistics (MIB) gathering counters
- Control registers configurable on-the-fly
- Ports
- 2 internal 10/100 PHYs with HP Auto-MDIX support
- Fully compliant with IEEE 802.3 standards
- 10BASE-T and 100BASE-TX support
- Full and half duplex support
- Full duplex flow control
- Backpressure (forced collision) half duplex flow control
- Automatic flow control based on programmable levels
- Automatic 32-bit CRC generation and checking
- Automatic payload padding
- 2K Jumbo packet support
- Programmable interframe gap, flow control pause value
- Full transmit/receive statistics
- Auto-negotiation
- Automatic MDI/MDI-X
- Loop-back mode
- High-performance host bus interface
- Provides in-band network communication path
- Access to management registers
- Simple, SRAM-like interface
- 16-bit data bus
- Big, little, and mixed endian support
- Large TX and RX FIFO's for high latency applications
- Programmable water marks and threshold levels
- Host interrupt support
- IEEE 1588 Hardware Time Stamp Unit
- Global 64-bit tunable clock
- Master or slave mode per port
- Time stamp on TX or RX of Sync and Delay_req packets per port, Timestamp on GPIO
- 64-bit timer comparator event generation (GPIO or IRQ)
- Comprehensive Power Management Features
- Wake on LAN
- Wake on link status change (energy detect)
- Magic packet wakeup
- Wakeup indicator event signal
- Other Features
- General Purpose Timer
- Serial EEPROM interface (I2C master or Microwire™ master) for non-managed configuration
- Programmable GPIOs/LEDs
- Single 3.3V power supply
- Available in Commercial & Industrial Temp. Ranges
Although the information in this document has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to product descriptions and specifications at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order. Products may contain design defects or errors known as anomalies which may cause a product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC's website at http://www.smsc.com. SMSC and the SMSC logo are registered trademarks of Standard Microsystems Corporation ("SMSC"). Other names mentioned may be trademarks of their respective holders. All claims made herein speak as of the date of this material. The company does not undertake to update such statements. |  |
