LAN9218
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX

	LAN9218 General Description
	Data Sheet, Application Notes, Drivers and Design Tools
	LAN9218 Family Overview (PDF File Size=291K)
	LANCheck™ Online Review

Highlights

	Optimized for the highest performance applications
	Efficient architecture with low CPU overhead
	Easily interfaces to most 32-bit and 16-bit embedded CPU’s
	Integrated PHY with HP Auto-MDIX
	Supports audio & video streaming over Ethernet: multiple high-definition (HD) MPEG2 streams
	Compatible with other members of LAN9218 family

Target Applications

	Video distribution systems, multi-room PVR
	Cable, satellite, and IP set-top boxes
	Digital video recorders and DVD recorder/players
	High definition televisions
	Digital media clients/servers and home gateways
	Video-over IP Solutions, IP PBX & video phones
	Wireless routers & access points
	High-end audio distribution systems

Key Benefits

	Non-PCI Ethernet controller for the highest performance applications Highest performing non-PCI Ethernet controller 32-bit interface with fast bus cycle times Burst-mode read support
	Eliminates dropped packets Internal buffer memory can store over 200 packets Automatic PAUSE and back-pressure flow control
	Minimizes CPU overhead Supports Slave-DMA Interrupt Pin with Programmable Hold-off timer
	Reduces system cost and increases design flexibility
	SRAM-like interface easily interfaces to most Embedded CPU’s or SoC’s
	Reduced-Power Modes Numerous power management modes Wake on LAN* Magic packet wakeup* Wakeup indicator event signal Link Status Change
	Single chip Ethernet controller Fully compliant with IEEE 802.3/802.3u standards Integrated Ethernet MAC and PHY 10BASE-T and 100BASE-TX support Full- and Half-duplex support Full-duplex flow control Backpressure for half-duplex flow control Preamble generation and removal Automatic 32-bit CRC generation and checking Automatic payload padding and pad removal Loop-back modes
	Flexible address filtering modes One 48-bit perfect address 64 hash-filtered multicast addresses Pass all multicast Promiscuous mode Inverse filtering Pass all incoming with status report Disable reception of broadcast packets
	Integrated 10/100 Ethernet PHY Supports HP Auto-MDIX Auto-negotiation Supports energy-detect power down
	High-Performance host bus interface Simple, SRAM-like interface 32 or 16-bit data bus 16Kbyte FIFO with flexible TX/RX allocation One configurable host interrupt
	Miscellaneous features Low-profile 100-pin TQFP, lead-free RoHS Compliant package Integrated 1.8V regulator General Purpose Timer Optional EEPROM interface Support for 3 status LEDs multiplexed with Programmable GPIO signals
	Single 3.3V Power Supply with 5V tolerant I/O
	0° to 70°C Commercial Temperature Support

*Third-party brands and names are the property of their respective owners.

General Description

The LAN9218 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9218 has been specifically architected to provide the highest performance possible for any given architecture. The LAN9218 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant, and supports HP Auto-MDIX.

The LAN9218 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit and 32-bit microprocessors and microcontrollers. The LAN9218 includes large transmit and receive data FIFOs with a high-speed host bus interface to accommodate high bandwidth, high latency applications. In addition, the LAN9218 memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity.

LAN9218 Data Sheet, Application Notes,
Drivers and Design Tools

Description	File Name	File Size	Date
LAN9218 Data Brief	9218db.pdf	99K	11/27/07
LAN9218 Data Sheet	9218.pdf	1547K	11/27/07
Reference Design Files
LAN9218 Reference Design Schematic	9218sch.pdf	45K	7/10/07
LAN9218 Reference Design Bill of Materials	9218bom.pdf	23K	6/20/07
LANCheck™ Online Review
The LAN9218 is supported by SMSC's LANCheck Online Review, a personalized, value-added service exclusive to SMSC and available at no charge to customers who have selected our Ethernet offerings for their application design-in. LANCheck will support your design process by providing guidance through the complete design cycle – from initial schematic design to PCB design. The following documents are available to assist you with your design:
LAN9218 Schematic Checklist
LAN9218 Component Placement Checklist
LAN9218 Routing Checklist
Application Notes
Application Note 8-13: Suggested Magnetics	an813.pdf	253K	2/6/08
Application Note 14-10: Migrating from the LAN9118 to the LAN9218I	an1410.pdf	178K	4/12/06
Source Code
SRC-118-EBOOT-XSCALE LAN9118 Family/LAN9215/LAN9218I/LAN9211 eBoot Driver for Xscale (PXA270) processor	Download	E-Services Account Required
SRC-118-LINUX-SH3 LAN9118 Family/LAN9215/LAN9218I Linux driver source code for SH3 processor	Download	E-Services Account Required
SRC-118-LINUX-XSCALE LAN9118 Family/LAN9215/LAN9218I/LAN9211 Linux driver source code for Xscale (PXA270) processor	Download	E-Services Account Required
SRC-118-PSEUDO Generic driver/pseudo-code for the LAN9118 Family/ LAN9215/LAN9218I	Download	E-Services Account Required
SRC-118-UBOOT-ARM LAN9118 Family/LAN9215/LAN9218I uboot driver source code for ARM processor	Download	E-Services Account Required
SRC-118-VXWORKS_55-SH3 LAN9118 Family/LAN9215/LAN9218I/LAN9211 VxWorks Driver for SH3 processor	Download	E-Services Account Required
SRC-118-WINCE_50&60-XSCALE LAN9118 Family/LAN9215/LAN9218I/LAN9211 Windows CE 5.0 and 6.0 driver source code for Xscale (PXA270) processor	Download	E-Services Account Required

Contact your SMSC Sales Representative for more information on the LAN9218