LPC47M112 General Description
	Data Sheet and Design Tools

Features

	3.3 Volt Operation (5 Volt Tolerant)
	LPC Interface
	ACPI 1.0 Compliant
	Fan Control Fan Speed Control Outputs Fan Tachometer Inputs
	Programmable Wake-Up Event Interface
	PC 98, PC99 Compliant
	Dual Game Port Interface
	MPU-401 MIDI Support
	General Purpose Input/Output Pins
	ISA Plug-and-Play Compatible Register Set
	Intelligent Auto Power Management
	System Management Interrupt
	2.88MB Super I/O Floppy Disk Controller Licensed CMOS 765B Floppy Disk Controller Software and Register Compatible with SMSC's Proprietary 82077AA Compatible Core Supports Two Floppy Drives Directly Configurable Open Drain/Push-Pull Output Drivers Supports Vertical Recording Format 16-Byte Data FIFO 100% IBM Compatibility Detects All Overrun and Underrun Conditions Sophisticated Power Control Circuitry (PCC) Including Multiple Powerdown Modes for Reduced Power Consumption DMA Enable Logic Data Rate and Drive Control Registers 480 Address, Up to Eight IRQ and Three DMA Options
	Enhanced Digital Data Separator 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates Programmable Precompensation Modes
	Keyboard Controller 8042 Software Compatible 8 Bit Microcomputer 2k Bytes of Program ROM 256 Bytes of Data RAM Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface Asynchronous Access to Two Data Registers and One Status Register Supports Interrupt and Polling Access 8 Bit Counter Timer Port 92 Support Fast Gate A20 and KRESET Outputs
	Serial Ports Two Full Function Serial Ports High Speed NS16C550 Compatible UARTs with Send/Receive 16-Byte FIFOs Supports 230k and 460k Baud Programmable Baud Rate Generator Modem Control Circuitry 480 Address and 15 IRQ Options
	Infrared Port Multiprotocol Infrared Interface IrDA 1.0 Compliant SHARP ASKIR 480 Address, Up to 15 IRQ
	Multi-Mode™ Parallel Port with ChiProtect™ Standard Mode IBM PC/XT, PC/AT, and PS/2 Compatible Bidirectional Parallel Port Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) IEEE 1284 Compliant Enhanced Capabilities Port (ECP) ChiProtect Circuitry for Protection 480 Address, Up to 15 IRQ and Three DMA Options
	LPC Interface Multiplexed Command, Address and Data Bus Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems PME Interface
	100 Pin QFP Package in a 3.2 mm Format; Lead-Free RoHS Compliant Package Also Available

General Description

The LPC47M112-MC is a 3.3V (5V tolerant) PC98/PC99 compliant Super I/O controller. The LPC47M112-MC implements the LPC interface, a pin reduced ISA bus interface which provides the same or better performance as the ISA/X-bus with a substantial savings in pins used. The LPC47M112-MC provides fan control through two fan speed control output pins and two fan tachometer input pins. It also provides 37 general purpose input/output (GPIO) pins, a dual game port interface and MPU-401 MIDI support.

The LPC47M112-MC incorporates a keyboard interface, SMSC's true CMOS 765B floppy disk controller, advanced digital data separator, two 16C550A compatible UARTs, one Multi-Mode parallel port which includes ChiProtect circuitry plus EPP and ECP, on-chip 12 mA AT bus drivers, one floppy direct drive support, and Intelligent Power Management including PME support. The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures in addition to providing data overflow and underflow protection. The SMSC advanced digital data separator incorporates SMSC's patented data separator technology, allowing for ease of testing and use. Both on-chip UARTs are compatible with the NS16C550A. The parallel port is compatible with IBM PC/AT architecture, as well as IEEE 1284 EPP and ECP. The LPC47M112-MC incorporates sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake-up events. The PCC supports multiple low power-down modes.

The LPC47M112 supports the ISA Plug-and-Play Standard (Version 1.0a) and provides the recommended functionality to support Windows '95, Windows 98, Windows 2000 and Windows ME.

The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M112-MC may be reprogrammed through the internal configuration registers. There are 480 I/O address location options, a Serialized IRQ interface, and three DMA channels.

The LPC47M112-MC does not require any external filter components and is therefore easy to use and offers lower system costs and reduced board area. The LPC47M112-MC is software and register compatible with SMSC's proprietary 82077AA core.

LPC47M112 Data Sheet and Design Tools

Description	File Name	File Size	Date
LPC47M112 Data Sheet	47m112.pdf	1511K	2/16/07