Features

	3.3 Volt Operation (5 Volt Tolerant)
	LPC Interface
	ACPI 1.0 Compliant
	Fan Control Fan Speed Control Outputs Fan Tachometer Inputs
	Programmable Wake-Up Event Interface
	PC98, PC99, PC99A Compliant
	Dual Game Port Interface
	MPU-401 MIDI Support
	General Purpose Input/Output Pins
	ISA Plug-and-Play Compatible Register Set
	Intelligent Auto Power Management
	System Management Interrupt
	2.88MB Super I/O Floppy Disk Controller Licensed CMOS 765B Floppy Disk Controller Software and Register Compatible with SMSC's Proprietary 82077AA Compatible Core Supports Two Floppy Drives Configurable Open Drain/Push-Pull Output Drivers Supports Vertical Recording Format 16-Byte Data FIFO 100% IBM Compatibility Detects All Overrun and Underrun Conditions Sophisticated Power Control Circuitry (PCC) Including Multiple Powerdown Modes for Reduced Power Consumption DMA Enable Logic Data Rate and Drive Control Registers 480 Address, up to Eight IRQ and Three DMA Options
	Enhanced Digital Data Separator 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates Programmable Precompensation Modes
	Keyboard Controller 8042 Software Compatible 8 Bit Microcomputer 2k Bytes of Program ROM 256 Bytes of Data RAM Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface Asynchronous Access to Two Data Registers and One Status Register Supports Interrupt and Polling Access 8 Bit Counter Time Port 92 Support Fast Gate A20 and KRESET Outputs
	Serial Ports Two Full Function Serial Ports High Speed NS16C550 Compatible UARTs with Send/Receive 16-Byte FIFOs Supports 230k and 460k Baud Programmable Baud Rate Generator Modem Control Circuitry 480 Address and 15 IRQ Options
	Infrared Port Multiprotocol Infrared Interface IrDA 1.0 Compliant Sharp ASK IR 480 Addresses, up to 15 IRQ
	Multi-Mode™ Parallel Port with ChiProtect™ Standard Mode IBM PC/XT, PC/AT, and PS/2 Compatible Bidirectional Parallel Port Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) IEEE 1284 Compliant Enhanced Capabilities Port (ECP) ChiProtect Circuitry for Protection
	USB Hub One Upstream, Four Downstream Ports Compliant with USB Spec. Version 1.1 Programmable USB Manufacturer ID, Product ID and Device Rev. Number Number of Active Downstream Ports Selectable or Programmable Powered by Vtr for Downstream Port Wakeup
	LPC Interface Multiplexed Command, Address and Data Bus Multiplexed Command, Address and Data Bus Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems PME Interface
	128 Pin QFP Package

General Description

The LPC47M142 is a 3.3V (5V tolerant) LPC Super I/O controller with a USB hub. The LPC47M14x is designed to be compatible with a family of LPC parts including the LPC47M13x Super I/O and an SMSC Super I/O part with Hardware Monitoring capabilities. The Super I/O section of these parts are pin compatible. Therefore, a board designed to support the LPC47M142 will automatically offer the dual capability of supporting the LPC47M13x, affording the board designer the added advantage of designing for multiple capabilities.

The LPC47M142 implements the LPC interface, a pin reduced ISA bus interface which provides the same or better performance as the ISA/X-bus with a substantial savings in pins used. This interface makes use of the PCI clock, which runs at 33MHz instead of the traditional 8MHz for the ISA bus, that eases some complications found in synchronous designs. In addition, all legacy drivers used for Super I/O components are still supported making this new interface transparent to the supporting software. The LPC bus also supports power management, such as wake-up and sleep modes, in the same way as the PCI bus.

The LPC47M142 incorporates a standalone USB Hub, implementing one upstream port and four downstream ports, with an internal data path connection for programming the USB Vendor ID, Product ID and Device Revision Number registers. The number of active downstream ports is selectable with external jumpers programmable via BIOS access to the hub control registers.

The LPC47M142 has incorporated the following Super I/O components: a parallel port that is compatible with IBM PC/AT architecture, as well as the IEEE 1284 EPP and ECP; two serial ports that are 16C550A UART compatible; a keyboard/mouse controller that uses an 8042 microcontroller; two floppy controllers, which use SMSC's true CMOS 765B core; two infrared ports that are IrDA 1.0 compliant; a MIDI interface, which is a MPU-401-compatible; and 37 General Purpose I/O control functions, which offer flexibility to the system designer. The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures and is software and register compatible with the 82077AA. This chip also controls two LED's, a dual game port interface, and the speed of two fans with fan tachometer inputs through the use of a pulse width modulation scheme.

The LPC47M142 is ACPI 1.0 compatible and therefore supports multiple low power-down modes. It incorporates sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake-up events.

The LPC47M142 supports the ISA Plug-and-Play Standard (Version 1.0a). The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M142 may be reprogrammed through the internal configuration registers. There are 480 I/O address location options, a Serialized IRQ interface, and three DMA channels. On chip, Interrupt Generating Registers enable external software to generate IRQ1 through IRQ15 on the Serial IRQ Interface.

The LPC47M142 does not require any external filter components and is therefore easy to use and offers lower system costs and reduced board area.