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LPC47N217
64-Pin Super I/O with LPC Interface
Features
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3.3 Volt Operation (5 Volt Tolerant) |
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Programmable Wakeup Event Interface (IO_PME#
Pin) |
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SMI Support (IO_SM# Pin) |
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GPIOs (14) |
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Two IRQ Input Pins |
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XNOR Chain
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PC99a, PC2001 |
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ACPI 2.0 Compliant |
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64-pin STQFP Lead-free RoHS Compliant Package |
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Intelligent Auto Power Management |
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Serial Ports
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One Full Function Serial Port |
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High Speed 16C550A Compatible UART
with Send/Receive 16- Byte FIFO |
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Supports 230k and 460k Baud |
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Programmable Baud Rate Generator |
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Modem Control Circuitry |
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Infrared Communications Controller
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IrDA v1.2 (4 Mbps), HPSIR, ASKIR,
Consumer IR Support |
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One IR Port |
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96 Base I/O Address, 15 IRQ Options
and Three DMA Options |
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Multi-Mode Parallel Port with ChiProtect
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Standard Mode IBM PC/XT, PC/AT, and
PS/2 Compatible Bidirectional Parallel Port |
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Enhanced Parallel Port (EPP) Compatible
- EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) |
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IEEE 1284 Compliant Enhanced Capabilities
Port (ECP) |
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ChiProtect Circuitry for Protection
Against Damage Due to Printer Power-On |
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192 Base I/O Address, 15 IRQ and
Three DMA Options |
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LPC Bus Host Interface
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Multiplexed Command, Address and
Data Bus |
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8-Bit I/O Transfers |
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8-Bit DMA Transfers |
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16-Bit Address Qualification |
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Serial IRQ Interface Compatible with
Serialized IRQ Support for PCI Systems |
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PCI nCLKRUN# Support |
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Power Management Event (IO_PME#)
Interface Pin |
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Ordering Information
Order Number:
LPC47N217-JV for 64 Pin STQFP Lead-Free RoHS Compliant Package |
General Description
The SMSC LPC47N217 is a 3.3V PC 99, PC2001, and ACPI 2.0 compliant Super I/O
Controller. The LPC47N217 implements the LPC interface, a pin reduced ISA
interface which provides the same or better performance as the ISA/X-bus
with a substantial savings in pins used. The part also includes 14 GPIO pins.
The LPC47N217 incorporates a 16C550A compatible UART and
one Multi-Mode parallel port with ChiProtect circuitry plus
EPP and ECP support. This device also offers a full 16-bit
internally decoded address bus, a Serial IRQ interface with
PCI CLKRUN# support, relocatable configuration ports, and three
DMA channel options.
The on-chip UART is compatible with the 16C550A. There is
a dedicated Serial Infrared interface UART, which complies
with IrDA v1.2 (Fast IR), HPSIR, and ASKIR formats (used by
Sharp and other PDAs), as well as Consumer IR.
The parallel port is compatible with IBM PC/AT architectures,
as well as IEEE 1284 EPP and ECP. The parallel port ChiProtect
circuitry prevents damage caused by an attached powered printer
when the LPC47N217 is not powered.
The LPC47N217 features Software Configurable Logic (SCL)
for ease of use. SCL allows programmable system configuration
of key functions such as the parallel port and UART.
The LPC47N217 supports the ISA Plug-and-Play Standard register
set (Version 1.0a) and provides the recommended functionality
to support Windows operation systems, PC99 and PC2001. The
I/O Address, DMA Channel, and Hardware IRQ of each device in
the LPC47N217 may be reprogrammed through the internal configuration
registers. There are multiple I/O address location options,
a Serialized IRQ interface, and three DMA channels.
Data Brief and Design
Tools
| Description |
File Name |
File Size |
Date |
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| LPC47N217 Data Brief |
47n217db.pdf |
90K |
3/29/07 |
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