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USB3250
USB 2.0 PHY IC

USB3250 Features
Go to Hi-Speed USB Page
Data Sheet, Application Notes, Drivers and Design Tools

General Description

The USB3250 provides the Physical Layer (PHY) interface to a USB 2.0 Device Controller. The IC is available in a 56 pin QFN.

The USB3250 is a USB 2.0 physical layer transceiver (PHY) integrated circuit. SMSC's proprietary technology results in low power dissipation, which is ideal for building a bus powered USB 2.0 peripheral. The PHY can be configured for either an 8-bit unidirectional or a 16-bit bidirectional parallel interface, which complies with the USB Transceiver Macrocell Interface (UTMI) specification. It supports 480Mbps transfer rate, while remaining backward compatible with USB 1.1 legacy protocol at 12Mbps.

All required termination for the USB 2.0 Transceiver is internal. Internal 5.25V short circuit protection of DP and DM lines is provided for USB compliance.

While transmitting data, the PHY serializes data and generates SYNC and EOP fields. It also performs needed bit stuffing and NRZI encoding. Likewise, while receiving data, the PHY de-serializes incoming data, stripping SYNC and EOP fields and performs bit un-stuffing and NRZI decoding.

Features

USB-IF "Hi-Speed" Certified to USB 2.0 Electrical Specification
Interface Compliant with the UTMI Specification (60MHz 8-bit Unidirectional Interface and 30MHz 16-bit Bidirectional Interface)
Supports 480Mbps High Speed (HS) and 12Mbps Full Speed (FS) Serial Data Transmission Rates
Integrated 45 Ohm and 1.5k Ohm Termination Resistors Reduce External Component Count
Internal Short Circuit Protection of DP and DM Lines
On-Chip Oscillator Operates with Low Cost 12MHz Crystal
Robust and Low Power Digital Clock and Data Recovery Circuit
SYNC and EOP Generation on Transmit Packets and Detection on Receive Packets
NRZI Encoding and Decoding
Bit Stuffing and Unstuffing with Error Detection
Supports the USB Suspend State, HS Detection, HS Chirp, Reset and Resume
Support for All Test Modes Defined in the USB 2.0 Specification
Draws 72mA (185mW) Maximum Current Consumption in HS Mode - Ideal for Bus Powered Functions
On-Die Decoupling Capacitance and Isolation for Immunity to Digital Switching Noise
Available in a 56-Pin QFN Package
Full Industrial Operating Temperature Range from -40°C to +85°C (Ambient)

ORDERING INFORMATION
Order Numbers:
USB3250-ABZJ for 56-pin 8 x 8 x 0.85mm QFN Lead Free Package

Simplified Block Diagram

USB3250: Measured Eye Diagram of High-Speed (480 Mbps) Test Mode Test Packet as Defined in Rev. 2.0 of the USB 2.0 Specification

USB3250 Data Sheet, Application Notes,
Drivers and Design Tools

Description File Name File Size Date
USB3250 Data Brief 3250db.pdf 450K 5/11/07
Evaluation Board      
EVB-USB3250
   Schematic, ORCAD 7.2
   Schematic, PDF
   Bill of Materials, Excel
   Bill of Materials, PDF
   User Guide
   Gerber Files
   Gerber Files, PDF

evb3250.dsn
evb3250.pdf
evb3250bom.xls
evb3250bom.pdf
evb3250userguide.pdf
evb3250gerber.zip
evb3250gerber_pdf.zip

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3/7/05
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11/15/04
3/2/05
3/2/05
Application Note      
AN 15-3: USB3250 PHY Layout Guidelines an153.pdf 1076K 7/18/06
Other Information      
USB3250 Frequently Asked Questions      
Mentor Graphics and SMSC USB 2.0
Reference Design
usb20refdes.pdf 435K 3/2/04
Using the Adobe® Acrobat® Reader aacrobat.html    
Links to Other USB-Related Sites
Note: These links are provided under the terms and conditions of SMSC's Web Site Use Agreement. Please refer to Legal Information.

About USB Implementer's Forum, Inc. - http://www.usb.org/about
USB Info: Frequently Asked Questions - http://www.usb.org/about/faq/

Serial Interface Engine Partner:
Mentor Graphics - USB 2.0 High/Full-Speed Function

Specifications:
UTMI
T&MT
USB-IF Documentation including USB 2.0 Specification and USB On-The-Go Supplement

 

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